A bit-serial floating point multiply/add architecture for signal processing applications /

Bibliographic Details

Main Author:	Williams, Bertrand Jeffery, 1959-
Format:	Thesis eBook
Language:	English
Published:	[Place of publication not identified] : [publisher not identified] ; 1983.
Subjects:	Computer architecture. Floating-point arithmetic. Signal processing. Major electrical engineering.
Online Access:	Link to OAKTrust copy